[cap-talk] Butler Lampson's upcoming talk

[Sam Mason]

On Wed, Apr 09, 2008 at 01:32:30PM -0400, Jack Lloyd wrote:
> On Wed, Apr 09, 2008 at 06:16:27PM +0100, Sam Mason wrote:
> 
> > I was under the impression that RISC was well and truly alive.  Most of
> > the newer (desktop/server) processor designs (i.e. PowerPC and Cell)
> > seem to be basically RISC designs.  I also thought that most embedded
> > processors were RISC as well, except maybe the really tiny ones.
> 
> Even x86/x86-64, the last suriving CISC (?), is basically a RISC these
> days - everything [*] since the Pentium Pro era works by dynamically
> translating x86 instructions into a series of fixed-length micro-ops
> which are a very RISC-like load/store architecture with a large
> register window and few complex instructions.

Yes, Intel x86 assembly language manuals are even written in terms of
these micro-ops.

> But then, a modern
> PowerPC like the PPC970 is arguably CISC - certainly it is much more
> complex ISA than the SPARCv7 or early MIPS had.

Isn't that a bit like saying that Haskell is imperative because it's got
a writeIORef function?

Speaking of Haskell, Lampson mentions "Fancy type systems" in the
failure part of his talk.  This seems strange as they seem to be making
very big inroads into mainstream programming languages, the next
version of Microsoft's Basic is, apparently, even going to support type
inference.


  Sam