[e-lang] Multi-Core Processor Software

[Bill Frantz]

erights at gmail.com (Mark Miller) on Monday, February 26, 2007 wrote:

>On 2/25/07, David Hopwood <david.nospam.hopwood at blueyonder.co.uk> wrote:
>> Bill Frantz wrote:
>> > Sharing an address space (or portion thereof), will allow deep-frozen,
>> > self-less objects (if I am using the correct jargon) to be passed with a
>> > pointer reference instead of a copy.
>>
>> DeepSelfless objects.
>
>
>Yes. In E, DeepPassByCopy implies both DeepFrozen and DeepSelfless.
>The boot-comm system checks for DeepPassByCopy.
>
>One subtlety previously pointed out (IIRC) by Kevin Reid:
>DeepPassByCopy is defined in terms of properties that are potentially
>observable by clients, whereas the boot-comm-system actually needs to
>know additionally that the object's implementation is thread-safe. The
>danger is that an object might be validly deemed DeepPassByCopy by us
>TCB designers, even though it doesn't pass the DeepPassByCopy auditor,
>because we know that these observable properties hold anyway. For
>example, it may internally contain a mutable cache that we know only
>effects performance, not overt behavior. Since pointer-sharing
>requires transitive (deep) safety, this difference is contagious: A
>DeepPassByCopy container is only deeply-thread-safe if it contains
>only deeply-thread-safe parts.

This might be a good place for David Hopwood's use of transactions to
protect the mutable cache from multi-thread update.  I've always liked
the use of CompareAndSwap functionality here.  If the cache is
implemented using a structure like a ConstMap; adding, changing, or
removing entries will be done by copying the map, making the change in
the copy process.  If the mutable pointer to the map still points to the
old version, the CompareAndSwap will update it to the new version.  If
it doesn't, then the CompareAndSwap will report the fact, and the
program can repeat the mutable cache update starting from the version
that some other thread left.  Note that CompareAndSwap is a hardware
instruction on many processors.

Cheers - Bill

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