[frantz@netcom.com: Re: Heterogeneity]

[Jonathan Shapiro]

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From: frantz@netcom.com (William S. Frantz)
Subject: Re: Heterogeneity
To: shap@viper.cis.upenn.edu (Jonathan Shapiro)
Date: Mon, 5 Dec 1994 17:34:46 -0800 (PST)
In-Reply-To: <199412051949.LAA09909@netcom2.netcom.com> from "Jonathan Shapiro" at Dec 5, 94 02:51:09 pm
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> Interpreting memory references is feasible, but I'll dismiss it
> without further discussion.
I wish you wouldn't dismiss it so quickly.  First, you only have to
interpret the stores.  Second, some hardware, the Motorola 68K family
comes to mind, provides hardware help.  Third, RISC hardware naturally
provides help through very simple store instructions.  Since there
is no upper limit on the protection size you may have to deal with,
You will have to face this kind of solution sometime.

I admit that a program being store interpreted will run slower then
the same program not being store interpreted, but the existence of
such programs will act as incentive to processor designers to keep
reasonable size protection boundries.

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Bill Frantz                   Periwinkle  --  Computer Consulting
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